1. Field of the Invention
The present invention relates to a circuit for adjusting a variable capacitance. The invention can be used for adjusting the variable capacitance provided in a frequency filter, for example.
2. Description of the Related Art
For example, an RC filter is known as a frequency filter. The RC filter is disclosed in FIG. 6 of U.S. Pat. No. 6,417,737, for example. In the RC filter, a resister R and a capacitor C are connected in parallel between one input end of an operational amplifier and an output terminal. The cut-off frequency in the frequency filter having the construction can be calculated by:
Fc=1/(2xcfx80RC)xe2x80x83xe2x80x83(1) 
In a semiconductor integrated circuit, the resister R and capacitor C contain polysilicon. However, when a resister contains polysilicon, variations of about xc2x110% may occur in resistance values of chips. Similarly, when a capacitor contains polysilicon, variations of about xc2x110% may occur in capacitance values of chips. Thus, the cut-off frequency Fc varies from 0.92 to 1.12 times of the designed value. In other words, variations of about xc2x120% may occur in cut-off frequencies Fc of chips.
Therefore, a frequency filter using a variable capacitor as the capacitor C has been already proposed. The frequency filter is disclosed in FIG. 41 of U.S. Pat. No. 6,417,737 and in FIG. 1 of JP-A-5-114835, for example.
Furthermore, a circuit for adjusting capacitance of the variable capacitor is disclosed in FIG. 39 of U.S. Pat. No. 6,417,737. By using the shown capacitance adjusting circuit, an optimum value of a capacitance set at the variable capacitor can be measured.
When a switch 193 is closed and a switch 194 is opened in the adjusting circuit disclosed in FIG. 39 of U.S. Pat. No. 6,417,737, charges flown from a pair of transistors 176 and 182 into a variable capacitor 188. The flowing charges are stored in the variable capacitor 188. A comparator 198 outputs a result of the comparison between a terminal voltage Vcap of the variable capacitor 188 and a reference voltage Vref. Then, the switch 193 is opened while the switch 194 is closed. Thus, the charges stored in the variable capacitor 188 are released to the ground.
Here, a parasitic capacitor is established between the gate and drain of the transistors 176 and 182. The parasitic capacitor stores a part of current flowing through the transistors 176 and 182. However, even when the switch 194 is closed, the charges stored in the parasitic capacitor are not discharged. This is because, when charges are released, the switch 193 is opened. The charges stored in the parasitic capacitor move to the variable capacitor 188 when the switch 193 is closed. The moving charges cause an error in terminal voltage Vcap of the variable capacitor 188.
Therefore, the capacitance adjusting circuit shown in FIG. 39 of U.S. Pat. No. 6,417,737 cannot have the sufficient precision.
A capacitance adjusting circuit according to the invention includes a first operational amplifier for inputting a reference voltage from one input terminal, a first transistor having one main electrode connected to a first power source line, the other main electrode connected to the other input terminal of the first operational amplifier and a control electrode connected to an output terminal of the first operational amplifier, a second transistor having one main electrode connected to the first power source line, and a control electrode connected to the output terminal of the first operational amplifier, a resistor having one end connected to the other main electrode of the first transistor and the other end connected to a second power source line, a first switch having one end connected to the other main electrode of the second transistor, a variable capacitor having one end connected to the other end of the first switch and the other end connected to the second power source line, a second switch having one end connected to the one end of the variable capacitor and the other end connected to the second power source line, a second operational amplifier having one input terminal connected to the one end of the variable capacitor and the other input terminal from which the reference voltage is input, a third switch having one end connected to the other main electrode of the second transistor, a load having one end connected to the other end of the third switch and the other end connected to the second power source line, and a control circuit for controlling the opening and closing of the first to third switches and for storing outputs of the second operational amplifier sequentially.
With this construction, by using the third switch and the load, charges stored in the parasitic capacitor between the other main electrode and the control electrode of the second transistor can be discharged to the second power source line.